华为在 IEEE ISCAS 上提出 Tau（τ）Scaling Law，用基于时间的优化替代几何晶体管微缩，覆盖器件、电路、芯片和系统层面。材料称华为过去六年设计并量产 381 颗芯片，采用 LogicFolding 架构的 Kirin 芯片将于今年秋天出货，目标是到 2031 年在不使用 EUV 的条件下达到等效 1.4nm 工艺的晶体管密度。
Chinas Huawei can't access EUV. So they wrote their own scaling law. The leverage of US export controls erodes.
Huawei just presented the Tau (τ) Scaling Law at IEEE ISCAS, a framework that replaces geometric transistor scaling with time-based optimization across devices, circuits, chips, and systems.
Huawei is not trying to win the nanometer race anymore. They're redefining it.
381 chips designed and mass-produced over six years. Kirin chips with their new LogicFolding architecture ship this fall. Target by 2031: transistor density equivalent to 1.4nm processes - without EUV (ASML embargo still hits hard)
Whether Tau Scaling delivers on that promise remains to be seen. But it shows one thing: US export controls cut Huawei off from cutting-edge lithography, and instead of hitting a wall, they built a parallel road.
China's semiconductor independence isn't hypothetical anymore. It's shipping in phones, running AI workloads, and now has its own scaling law presented at one of the world's top circuit design conferences.
If Huawei can close the performance gap through architecture instead of lithography, the entire leverage of US export controls erodes. The sanctions were designed to keep China two generations behind. Huawei is trying to make that metric irrelevant.
h/t @AndrewCurran_ for finding this interesting blogarticle and @zephyr_z9 for the photo
Huawei says it has made a breakthrough and expects to design high-end chips with transistor density equivalent to 1.4 nm processes by 2031.在 X 查看被引用的帖子
来源：@kimmonismus · x.com