AI 导读
台积电将在 IEDM 上展示 A14 工艺的 6T 高密度 SRAM 单元，面积小于 0.017μm2，为世界最小。此前自 2020 年 N5 以来一直停留在 0.021μm2，新设计密度提升 25%，在内存瓶颈加剧、设计使用更多 SRAM 的背景下意义重大。
正文
After eight long years, TSMC is finally shrinking their 6T High Density SRAM bitcell for their A14 process! At IEDM, they will present the world's smallest bitcell, <0.017μm2 on their 2028 node. TSMC has been stuck at 0.021μm2 since N5 in 2020. With designs utilizing even more SRAM as memory bottlenecks grow, a 25% denser SRAM with A14 is significant.
来源：SemiAnalysis · x.com